Parity Compilation on any quantum device and for any problem
Innsbruck, 18th October 2023 – A group of physicists from ParityQC have developed innovative methods that enable Parity Compilation (the compilation method based on the ParityQC Architecture) on any type of quantum device, and for solving any type of computational problem. The physicists presented the invention in the paper “Flexible Constraint Compilation in the Parity Architecture” published in the journal Physical Review A.
ParityQC’s patented quantum architecture, the ParityQC Architecture, was first introduced in 2015 as a solution for the issue of qubit connectivity in quantum computers, offering an efficient way to solve optimization problems. Its field of application proved to not be limited to optimization problems alone, as recent research has shown that the Architecture can be efficiently used to implement arbitrary quantum algorithms through a universal gate set. Another breakthrough in the development of the ParityQC Architecture has now been presented in the paper “Flexible Constraint Compilation in the Parity Architecture”, published in the journal Physical Review A. In the paper, a group of physicists from ParityQC – Roeland ter Hoeven, Anette Messinger and Wolfgang Lechner – present a new strategy to perform the Parity Compilation on arbitrary devices for arbitrary problems, paving the way to the compilation of hard optimization problems on any type of digital quantum computing platform. The Parity Compilation, which was key in this breakthrough, is the innovative compilation method based on the ParityQC Architecture.
This new compilation strategy is an important step forward in the evolution of the ParityQC Architecture, which has the potential to solve some of the most pressing issues in the development of quantum hardware. In the past few years, quantum computers have experienced impressive advancements in terms of number of qubits as well as coherence, but one of the major challenges in building scalable quantum computers remains qubit connectivity. Quantum noise – for example crosstalk errors leading to issues like frequency crowding – but also more practical design considerations can limit the number of qubits that are connected. When the ParityQC Architecture was first introduced in 2015, it was clear that it could be a straightforward solution for the issue of qubit connectivity, offering a way to solve optimization problems with quantum computers. And its field of application proved to not be limited to optimization problems alone. The recent paper “Universal Parity Quantum Computing” showed that the Architecture can be efficiently used to implement arbitrary quantum algorithms, through a universal gate set. The new compilation technique presented in the paper “Flexible Constraint Compilation in the Parity Architecture” is a significant step forward as it allows to overcome what has been until now a significant challenge: the Parity Compilation of hard optimization problems on restricted quantum hardware (for example, devices with less than square-lattice nearest-neighbor connectivity).
Hard optimization problems are omnipresent in various industrial fields and they can include constraints and higher-order interactions, which are notoriously difficult to implement. Previous approaches taken by ParityQC to tackle these problems required all Parity Constraints to be local, which made it impossible to complete the Parity Mapping for some sparsely connected devices (e.g. linear chains or hexagonal lattices). This novel solution, on the other hand, is based on an innovative technique called bridging and it allows to implement non-local constraints in a more efficient way, going beyond the conventional use of SWAP gates. In the paper, the physicists propose different methods to minimize the non-locality of the required operations for a given optimization problem and hardware layout, demonstrating their efficiency. Being able to perform the Parity Compilation to solve any type of hard optimization problem on any type of quantum hardware represents a very important milestone, proving the high potential benefits of the ParityQC Architecture for quantum hardware developers.
Publication:
- Roeland ter Hoeven, Anette Messinger, Wolfgang Lechner. Flexible Constraint Compilation in the Parity Architecture. Physical Review A (2023)