ParityQC | The Quantum Architecture Company

At ParityQC, we develop blueprints for quantum computers based on the ParityQC architecture. The architecture introduces a paradigm shift in encoding optimization problems, creating quantum computers which are scalable by radically reducing the control complexity. Our co-development approach to hardware and software results in quantum chips and algorithms that fit together perfectly.

ParityQC’s operating system, ParityOS, provides access to all the advantages of our architecture via the cloud. Through our compiler, we solve industry-relevant optimization problems much faster in comparison to the current standard approaches.

Translation to Quantum Computers

Due to their complexity, real-world problems require a large number of qubits when encoding them on a quantum computer. In the standard approach, these problems are either encoded directly into the hardware or in gates between qubits. This results in complex chip layouts and large systems.

Reduced Complexity & Simplified Control

The ParityQC architecture separates the problem from the hardware and introduces a revolutionary parallelizable design. As a consequence, the same chip can solve any optimization problem. The end result is a structure that is simple and parallelizable, ensuring ease of scalability and full programmability. The architecture provides benefits for every currently available 2D hardware platforms and for both digital and analog methods.

A combined approach: hardware and software working in parity.

The key to a perfectly aligned quantum computer is the simultaneous development of hardware and software: this approach will ensure we achieve quantum advantage in the near-term. By adopting our unique architecture together with ParityOS, hardware developers benefit from years of research in a complete package that offers a simple blueprint for quantum chips and an operating system that is easy to implement.

Performance with ParityOS

Solve real-world problems with simpler and smaller chips

ParityOS enables hardware developers and users to skip the spin-model representation and encode industry-relevant problems directly along with multi-variable correlations and side conditions. This introduces a new way of approaching industry-relevant problems with higher-order constrained binary optimization (HCBO).

ParityOS Constraints Benchmarks

ParityOS and architecture performance in Quantum Chemistry: Groundstate calculation of LiH (lithium hydrid) molecule. For digital quantum computing, ParityOS substantially reduces the number of gates and total clock time compared to the standard gate model